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Linux on LiteX-VexRiscv

Language: Python

The repo below has support for building a 32bit RISC-V CPU for de10nano. It also includes information about booting Linux.

https://github.com/litex-hub/linux-on-litex-vexriscv

The CPU will likely have a clock speed around 100Mhz, far slower than the 1.5Ghz 64bit cores on the VisionFive 2 or Pi4. The FPGA might still be useful if you want to customize the CPU or integrate other custom hardware.

Yep! You can run linux even on an entirely open source from hardware to software toolchain: https://github.com/litex-hub/linux-on-litex-vexriscv Though the FPGA IC itself of course is not open, the bitstream generation is, and there are many fully open source hardware board designs, for example the orangecrab. With a Lattice 85K gate FPGA, you can get 4x 32bit riscv cores at 50Mhz or 1 64bit riscv rocket 64 bit core at 20Mhz
"Linux on LiteX-Vexriscv" [1] is a fun way to get started. The readme includes a table of supported boards, as well as the amount of memory and maximum tested clock frequency.

I played with it on an OrangeCrab [2], and was shocked by how easy it was to get it running and by how well it worked despite the slow clock. The FPGA design includes peripherals for GPIO, PWM, serial interfaces, etc., and the kernel includes drivers to talk to them. On the OrangeCrab, everything I thought to try pretty much just worked as expected.

That being said, this is mostly just a fun exercise in SoC building, and isn't going to give you PC-like performance. VexRiscv is small and fast and super configurable, but you're still looking at "high-end microcontroller" rather than "low-end application processor" levels of performance.

[1] https://github.com/litex-hub/linux-on-litex-vexriscv

[2] https://1bitsquared.com/products/orangecrab

Oh hey, I was just playing with this... it's really cool!

There's a "Linux on LiteX-VexRiscv" design [1] that adds a DDR controller and MMU to the shared bus as well as a handful of other pieces that allow you to boot a Linux kernel image, mount a filesystem, and get a shell prompt over a serial terminal or ssh.

You can then use familiar interfaces to talk to whatever peripherals you decided to include, e.g.:

    $ echo 1 > /sys/class/gpio/gpio508/value
    $ echo 50 > /sys/class/pwm/pwmchip0/duty_cycle
I got it to run on Greg Davill's [2] Orange Crab FPGA board [3] last night, which was actually pretty easy, as it's one of the supported boards. It was surprisingly usable, even with the soft processor only running at 64 MHz. This was also the first time I used the open source synthesis / place-and-route tools to do anything more complicated than an adder, and they were fast and worked flawlessly.

[1] https://github.com/litex-hub/linux-on-litex-vexriscv

[2] https://twitter.com/gregdavill - He posts a lot of really cool macro and microscope photos of electronics assembly

[3] https://github.com/gregdavill/OrangeCrab

A RISC-V linux system for the ECP5 can be built with the FOSS toolchain using vexriscv and litex:

https://github.com/litex-hub/linux-on-litex-vexriscv

also, step by step using a different core (rocket): https://insights.sei.cmu.edu/sei_blog/2019/10/how-to-build-a...