What does HackerNews think of apio?
:seedling: Open source ecosystem for open FPGA boards
[0] https://tinyvision.ai/products/upduino-v3-1
[1] https://github.com/FPGAwars/apio
[2] https://daveho.github.io/2021/02/07/upduino3-getting-started...
I think the biggest development, though, is that there's enormously more off-the-shelf Verilog and VHDL, not just on OpenCores like 20 years ago, but also on GitLab, GitHub, and so on. Easy examples are CPUs like James Beckman's J1A, the VexRiscv design used in Bunnie's Precursor: https://github.com/SpinalHDL/VexRiscv (as little as 504 Artix-7 LUTs and 505 flip-flops), and Google's OpenTitan.
But from my POV the more interesting reason for using an FPGA is for things that aren't CPUs. For example, the SUMP logic analyzer and its progeny OLS https://sigrok.org/wiki/Openbench_Logic_Sniffer (32 channels at 200MHz), although I think both of these require the proprietary vendor tools to synthesize. I'm gonna go out on a limb here and guess that reliably buffering up data at 6.4 gigabits per second is not a thing that any CPU can do, even one that isn't a softcore; CPUs that run at speeds high enough to potentially do it invariably depend on cache hierarchies that monkeywrench your timing predictability.
As I said, though, I'm not active in the field, so all I know is hearsay.
Side note, this might seem like stupid question, but can anyone explain what APIO[1] is (which TinyFPGA uses)? I'm kind of confused what it's used for.