mitigations=off

This won't restore your performance in this case: the microcode changes the behavior of the zero store optimization without any action from the kernel. If you accept the new microcode, you get the new, slower behavior.

Perhaps there is an MSR bit you can flip to set the behavior back to the old way, but none has emerged so far.

Might want to look for them here: https://github.com/intel/Intel-Linux-Processor-Microcode-Dat...

As to how to actually use those files to get your "intel-ucode.img", just take a look at: https://archlinux.org/packages/extra/any/intel-ucode/

For the "iucode_tool": https://gitlab.com/iucode-tool/iucode-tool/-/wikis/home

The actual PKGBUILD for it on Arch Linux: https://github.com/archlinux/svntogit-packages/blob/packages...

---

  cd Intel-Linux-Processor-Microcode-Data-Files-microcode-${pkgver/./}
  rm -f intel-ucode{,-with-caveats}/list
  mkdir -p kernel/x86/microcode
  iucode_tool --write-earlyfw=intel-ucode.img intel-ucode{,-with-caveats}/