I wonder if this will be good for open source. Is there a RISK-V-like equivalent of whatever it is that's being blocked?
No, free/open-source semiconductor design software and equipment is non-existent, especially for modern nodes.
Well, that's definitely not the case, a lot of labs are on this (including Berkley's hammer/chisel [1]).
I've seen some tools presented at RISC-V conferences, but the major closed-source component nowadays is the PDK, I'm afraid.
Hopefully, inkjet-printed transistors or some other fabless technology will make open source ICs a lot more feasible. One of the major issue is costs, when you look at more than 40k/mm² for multiproject wafers in advanced nodes and contrast that with the anemic budget most open source software has to do with. You don't need to be on the very latest node, if you can afford going slower, on bigger, cheaper dies.
A lot of open source "hardware" project seem to focus on FPGAs, since that's more approachable, and the costs are nowhere as high.
I would also like to point out that these tools will likely help us juice up a bit more performance from the existing processes, but we aren't really likely to see a lot more of Moore's scaling, going forward. So the door is open to new processes, that may or may not be open hardware-friendly. And current, top-end processes might also become cheaper over time. While I doubt a lot of new foundries will catch up with the end of Moore's scale, it might actually become easier to get there, while disruptive technologies get some time to play catch-up. Together with innovative synthesis tools.