Awesome! Can one submit semi-custom or full-custom layouts as well as digital logic?
We have FPGAs for (most) logic stuff, but what if I wanted a tiny, power-efficient RF (Wi-Fi or GPS for instance) chip?
Can you do it in 1000 logic gates, in a size of 150 x 170 um?
There are very few things that are more complex than toys which fit in that space. It's primarily a learning opportunity, not a hack to build a product.
Also, most of the hard work in Wi-Fi and GPS modules is not in receiving the binary radio signal but in the protocols to decode it. For wifi, the 802.11 protocol would require your PHY to provide at the very least the orthogonal frequency-division multiplexing, but you're probably expecting something closer to a Wiznet chip that provides the fundamental stack available from eg. the lwIP project.
That opens the door to less conventional stuff, such as CMOS imagers, memories, RF/Analog designs, etc. Obviously the available space and I/O are going to be limitting factors.
Regarding Wi-Fi, I was thinking of some of the RF frontend for a project such as [1]. I am not extremely knowledgeable about RF, so that would be a learning opportunity. I imagine it to be mostly carrier generation and multiplexing, the higher layers are doable on an off-the-shelf FPGA.
That said, Wi-Fi is a simple target, but maybe not the most interesting one. That's the first full-custom application example I thought of.