They just open-sourced the instruction set. That is a big thing but if I am understanding it correctly, this is pretty much relinquishing the copyright to the instruction set. They are not open-sourcing any CPU.
So, partially correct. The ISA, along with the new memory bus (OMI) and some other infrastructural specs - are being licensed under an open source license with patent grants; it's still very much copyrighted, in the same way the Linux kernel is Open Source but still copyrighted. The microarchitectural implementations of that ISA specification - POWER9, etc - are still proprietary, even if extremely well publicly documented. IBM still expects to make a lot of money with the highest performing open source ISA implementation on the market.
So you can't fab your own power9, but you can spend the R&D to make a new chip and have it be compatible with the Power port of linux, gcc, etc.
Right?
Yes. It's best to contrast this versus say ARM where everyone has to pay for the ISA and potentially they also license an implementation or partial reusable designs. Sparc, Risc-V, MIPS and PowerISA are royalty free ISAs with open source implementations.
The ISA and implementation of POWER has been license-able from the beginning. You can still license implementations, depending on what you are doing that may be pretty cost effective.
You can't fab the same POWER9 that ships from IBM, but like you implied, someone could (eventually) fab a POWER9 CPU built on an open-source core.
The microwatt project [0] was demoed at the OpenPOWER Summit and is an open-source softcore. I'm very interested in watching to see what happens with this project and how much of the ISA they end up implementing. They've run a subset of micropython [1] on it and apparently gotten a few FPGAs working. The Summit talk [2] mentioned DRAM support and Linux support potentially being on the roadmap.
[0]: https://github.com/antonblanchard/microwatt