There was another language kinda similar to this (functional language HDL), called Bluespec. It was originally very Haskell-like, but at some point had to change its syntax to a more C-like version because of its unpopularity with hardware engineers. I had to use the newer version at my Computer Architecture class, and although the experience was way better than Verilog, it had very little documention/tutorials (being a commercial product and having almost no users), which made understanding the more complex parts of the language really hard.

Nowadays Chisel seems to be the best bet if you want a sane Verilog alternative (with functional-lang features) for your HDL needs. (https://www.chisel-lang.org/) It was originally a transpiler to Verilog, but recently it began to have its own IR code (FIRRTL) for optimization purposes.