Hopefully, EDA tools for chip-design will get similar attention too, as well as a "normal" CADs. Software like LibreCAD[1] and FreeCAD[2], Qucs[3], gEDA[4], Yosys[5] and Symbiflow[6], Chisel/FIRRTL[7], OpenROAD initiative[8], Degate[9], and many others.

[1] https://librecad.org/

[2] https://www.freecadweb.org/

[3] https://github.com/Qucs

[4] http://www.geda-project.org/

[5] http://www.clifford.at/yosys/

[6] https://symbiflow.github.io/

[7] https://www.chisel-lang.org/

[8] https://theopenroadproject.org/

[9] https://github.com/nitram2342/degate

Is there a high level overview, for programmers, of how chip design software works? Something I eventually want to investigate is building some of those pieces of software but I have no idea where to get started learning about that ecosystem. From a software perspective I have a good understanding of how source gets turned into machine code, which gets packaged into shared object code, which then gets linked into a binary. How do those steps work for HDLs? What standards are involved? How do you test that each of those steps works?

Take a look at Verilog-to-Routing - an educational/research tool that is open-source.

https://github.com/verilog-to-routing/vtr-verilog-to-routing