The animations at the bottom are really fascinating. I wonder if it's some kind of simulated annealing algorithm(s)?
That is correct, VPR's placement is done using simulated annealing.
See section 8 of this paper (https://dl.acm.org/doi/pdf/10.1145/3388617), the originals VPR paper (https://link.springer.com/chapter/10.1007/3-540-63465-7_226), and the source code (https://github.com/verilog-to-routing/vtr-verilog-to-routing...) for more details.